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edits
7000 Series plug-in interface: Difference between revisions
Corrected logic levels in description of pin B7 (MF Chan Switch). Added note to description of pin B16 (Aux Y Axis) that it must only be driven when MF Channel Switch ≠ MF Mode.
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(Corrected logic levels in description of pin B7 (MF Chan Switch). Added note to description of pin B16 (Aux Y Axis) that it must only be driven when MF Channel Switch ≠ MF Mode.) |
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* ''Alt Drive'' − 0/+5 V; high level will display channel 2 of a dual-trace plug-in, low will display channel 1. | * ''Alt Drive'' − 0/+5 V; high level will display channel 2 of a dual-trace plug-in, low will display channel 1. | ||
* ''Intensity Limit'' − Switched to ground by timebase in slow sweep speeds (≥100 ms/Div), limits beam intensity to protect the CRT [[phosphor]]. | * ''Intensity Limit'' − Switched to ground by timebase in slow sweep speeds (≥100 ms/Div), limits beam intensity to protect the CRT [[phosphor]]. | ||
* ''Mainframe Channel Switch'' | * ''Mainframe Channel Switch'' − -0.6/+1.1 V logic levels; plug-in output is displayed when MF Channel Switch ≠ MF Mode (XOR). | ||
* ''Mainframe Mode'' − 0/+5 V logic levels; plug-in output is displayed when MF Channel Switch ≠ MF Mode (XOR). | |||
* ''Sweep Inhibit/Sweep Lockout'' - Mainframe injects current > 1 mA to prevent time base from sweeping. Used for ALT sequencing and delayed sweep of the ''B'' time base. | * ''Sweep Inhibit/Sweep Lockout'' - Mainframe injects current > 1 mA to prevent time base from sweeping. Used for ALT sequencing and delayed sweep of the ''B'' time base. | ||
* ''Delay Gate'' − negative-going pulse starting at the end of the delay period, and lasting until the end of the sweep from the delaying timebase. Mainframes connect this signal from the ''A'' timebase through a 2 k resistor and a diode to B8 ''Sweep inhibit'' of the ''B'' time base to trigger the delayed sweep. +Gate Output on mainframe uses Delay Gate from H slot B when Delay Gate is selected. Grounded in amplifier plugins. | * ''Delay Gate'' − negative-going pulse starting at the end of the delay period, and lasting until the end of the sweep from the delaying timebase. Mainframes connect this signal from the ''A'' timebase through a 2 k resistor and a diode to B8 ''Sweep inhibit'' of the ''B'' time base to trigger the delayed sweep. +Gate Output on mainframe uses Delay Gate from H slot B when Delay Gate is selected. Grounded in amplifier plugins. | ||
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* ''Single Sweep Logic'' − 0/+5 V; high level when time-base is in single sweep mode. | * ''Single Sweep Logic'' − 0/+5 V; high level when time-base is in single sweep mode. | ||
* ''Single Sweep Reset'' − Switched to ground to reset single sweep. | * ''Single Sweep Reset'' − Switched to ground to reset single sweep. | ||
* ''Aux Y | * ''Aux Y Axis'' − Current-driven input to mainframe allowing vertical separation of two traces with dual timebase plugins. 1 mA/Div sensitivity; driven only when plug-in output is displayed (see ''MF Ch Switch'' above). | ||
* ''Aux Z Axis'' − Current-driven input to mainframe allowing plugins to modulate beam intensity, e.g. in dual timebase A intensified by B display mode; driven only when plug-in output is displayed (see ''MF Ch Switch'' above). | * ''Aux Z Axis'' − Current-driven input to mainframe allowing plugins to modulate beam intensity, e.g. in dual timebase A intensified by B display mode; driven only when plug-in output is displayed (see ''MF Ch Switch'' above). | ||
* ''Trigger In'' − Trigger signal input on H plugin, routed from V plugin's trigger output. Differential, 50 Ω per side, 50 mV/Div (differential). | * ''Trigger In'' − Trigger signal input on H plugin, routed from V plugin's trigger output. Differential, 50 Ω per side, 50 mV/Div (differential). | ||