P7001: Difference between revisions

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(Added an overview of available external interfaces)
(Added fictional workflow of DPO with connected controller / Changed some pic descriptions)
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P7001_program_overlay_card.jpg|Example of aftermarket overlay cards
P7001_program_overlay_card.jpg|Example of aftermarket overlay cards
</gallery>
</gallery>
'''GPIB'''
'''External Interfaces (optional)'''
<gallery>
<gallery>
P7001 GPIB adaper left dismounted.jpg|IO board
P7001 dpo controller.jpg|CPBus interface mounted
P7001 GPIB adaper left mounted.jpg|IO board with shielding
P7001 dpo controller board.jpg|CP Bus Interface front
P7001 GPIB adaper right dismounted.jpg|CPU board
P7001 dpo controller back.jpg|CP Bus Interface rear
P7001 GPIB adaper left dismounted.jpg|GPIB Interface IO board
P7001 GPIB adaper left mounted.jpg|GPIB Interface IO board with shielding
P7001 GPIB adaper right dismounted.jpg|GPIB Interface CPU board
P7001_GPIB_clone_Front.jpg|Modern clone of the P7001 GPIB interface
P7001_GPIB_clone_Front.jpg|Modern clone of the P7001 GPIB interface
P7001_GPIB_clone_Rear.jpg|Modern clone of the P7001 GPIB interface
P7001_GPIB_clone_Rear.jpg|Modern clone of the P7001 GPIB interface
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P7001 sample hold back.jpg|Sample and hold rear
P7001 sample hold back.jpg|Sample and hold rear
</gallery>
</gallery>
'''Core memory with controller (otional)'''
'''Core Memory (optional)'''
<gallery>
<gallery>
P7001 dpo controller.jpg|Controller card
P7001 dpo controller board.jpg|Controller card
P7001 dpo controller back.jpg|Controller card
P7001 diode decoder.jpg|Address decoder
P7001 diode decoder.jpg|Address decoder
P7001 core boards.jpg|Core boards
P7001 core boards.jpg|Core boards
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P7001 CORE DETAIL01.JPG|Detailed view of Core
P7001 CORE DETAIL01.JPG|Detailed view of Core
</gallery>
</gallery>
'''Semiconductor memory (otional)'''
'''Semiconductor memory (optional)'''
<gallery>
<gallery>
P7001 2k memory.jpg|2K semiconductor memory (aka "MOS")
P7001 2k memory.jpg|2K semiconductor memory (aka "MOS")
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P7001 apd interconnect.jpg|APD Interconnect  
P7001 apd interconnect.jpg|APD Interconnect  
</gallery>
</gallery>
'''Workflow with connected Controller'''
<gallery>
Tek_P7001_workflow01.jpg|A signal is digitized on the P7001...
Tek_P7001_workflow02.png|...and transferred to the Controller...
Tek_P7001_workflow03.png|...the Controller does some calculations...
Tek_P7001_workflow04.jpg|...and transfers the result back to the P7001
</gallery>


===Firmware (uploaded BIN files) ===
===Firmware (uploaded BIN files) ===

Revision as of 09:45, 27 July 2019

Tektronix P7001 front panel

The Tektronix P7001 is a digitizer, processor, and memory for the 7704A oscilloscope.

The design of the P7001 assumes it will be part of a 7704A system, and that the 7704A will be displaying a steady trace. The vertical and horizonal plug-ins control the beam as they would in any 7000-series scope.

The P7001 periodically samples the horizontal and vertical signals simultaneously as they pass from the plug-ins to the vertical and horizontal amplifiers. This allows it to fill its memory with data points represented as coordinate pairs, (x1,y1), (x2,y2), (x3,y3), etc. It is not necessary that x2 be greater than x1, i.e. the samples can be taken out-of-order with respect to their equivalent time in the waveform.

Key Specifications

Resolution 10 bit (V), 9 bit (H)
Memory four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)
Sampling rate 150 kHz ±30 kHz
External interface 16 bit parallel, proprietary "CP bus" (dual 37-pin Sub-D connectors) interfacing with Tektronix CP-1100 or CP-4100 series controllers

Manuals

Links

Internals

The signal coming from the acquisition unit enters a fast four-diode sample and hold circuit where it is sampled at 150 ksamples/sec. Each sample is digitized using a successive-approximation scheme. The analog to digital converter is made of several chips: a digital to analog converter, a comparator, and control logic.

The P7001 has its own power supply built into it, independent of the power supply in the acquisition unit of the 7704A. It has a backplane with an asynchronous bus and several cards that plug into that bus: sampler, analog to digital converter, memory, external digital interface, and display electronics. The P7001 was available with semiconductor memory or with magnetic core memory. Both types of memory were available through the whole production time of the P7001. In the first years the core memory module was cheaper and the default module. In later years the semiconductor memory module got cheaper and then this module was the default one. But the core memory module has one big adavantage: The memory content was preserved during a shutdown of the unit. This may have been the reason the core memory option remained available in the later years of P7001 production.

The bus is used for low speed signals. High speed signals are sent through coaxial cables that connect to the cards using Peltola connectors.

The Acquisition Unit of the 7704A, the P7001 Processor, and the Display Unit of the 7704A are connected by the Acquisition-Processor-Display (APD) Interface shown below.

External Interfaces

Part Number Description
021-0113-00 DPO to Data General Nova
021-0116-00 DPO to APD
021-0117-00 DPO to CP1100 (CP Bus)
021-0127-00 DPO to TEK31 calculator
021-0146-00 DPO to CAMAC
021-0175-00 DPO to 4010 Family
021-0206-00 DPO to GPIB

Pictures

Internal

Keyboard overlay cards

External Interfaces (optional)

Sample and Hold Card

Core Memory (optional)

Semiconductor memory (optional)

ADC and Display

Hardware signal Averager (HSA)

Schematics

Workflow with connected Controller


Firmware (uploaded BIN files)