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7000 Series plug-in interface: Difference between revisions
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The [[7000-series scopes]] have two categories of slots, horizontal and vertical, that have partly different but compatible interconnects so that vertical plugins can be installed in horizontal slots and vice versa, but not with all functions. | The [[7000-series scopes]] have two categories of slots, horizontal and vertical, that have partly different but compatible interconnects so that vertical plugins can be installed in horizontal slots and vice versa, but not with all functions. | ||
The interconnect is a 76-pin PCB edge connector. Looking into the mainframe from the front panel, "A" pins are left and "B" are right of the connector centerline, and pins are numbered from 1 at the bottom to 38 on the top. (A pins are on the [[:File:Tek-7a17-left-board.jpg|plug-in PCB's component side]], B pins on the [[:File:Tek-7a17-right-board.jpg|solder side]].) In the following table, (H) indicates signals available in horizontal slots only, and (V) denotes signals available in vertical slots only. | The interconnect is a 76-pin PCB edge connector. Looking into the mainframe from the front panel, "A" pins are left and "B" are right of the connector centerline, and pins are numbered from 1 at the bottom to 38 on the top. (A pins are on the [[:File:Tek-7a17-left-board.jpg|plug-in PCB's component side]], B pins on the [[:File:Tek-7a17-right-board.jpg|solder side]].) In the following table, (H) indicates signals available in horizontal slots only, (H-A) is horizontal slot A, (H-B) is horizontal slot B, and (V) denotes signals available in vertical slots only. | ||
{| | {| | ||
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! Function | ! Function | ||
|- | |- | ||
| 1 || Sweep Gate (H) || Delay mode ctl in (H) | | 1 || Sweep Gate (H) || Delay mode ctl in (H-B) | ||
|- | |- | ||
| 2 || Gate common || Delay mode ctl out ( | | 2 || Gate common || Delay mode ctl out (H-A) | ||
|- | |- | ||
| 3 || A Sweep ''[note 1]'' || B Sweep ''[note 1]'' | | 3 || A Sweep ''[note 1]'' || B Sweep ''[note 1]'' | ||
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===Description of signals=== | ===Description of signals=== | ||
* ''Sweep Gate'' − | * ''Sweep Gate'' − | ||
* ''Delay Mode Control | * ''Delay Mode Control'' − Output on delaying timebase in horizontal slot A, connected to input on delayed timebase in horizontal slot B. >+3 V disables auto sweep in delayed timebase; 0 V enables independent timebase function. | ||
* ''A/B Sweep'' − | * ''A/B Sweep'' − | ||
* ''Line Trigger'' − Approx. 1 V<sub>RMS</sub> mains-frequency signal from power supply (through transformer) | * ''Line Trigger'' − Approx. 1 V<sub>RMS</sub> mains-frequency signal from power supply (through transformer) | ||