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The 7L12 is a traditional triple-mixing spectrum analyzer design. The input signal runs through a step attenuator (0 to 60 dB in 10 dB steps), a 1.8 GHz low-pass filter and a 3 dB pad (to isolate the mixer from LPF reflections) to a 1<sup>st</sup> mixer. The 1<sup>st</sup> LO is a YIG oscillator running at 2.095 GHz to 3.9 GHz, resulting in a 2.095 GHz 1<sup>st</sup> IF. This IF passes through a "traveling wave damper" (isolator), a 2.2 GHz LPF and a 10 MHz wide 2.095 GHz bandpass filter before reaching the 2<sup>nd</sup> mixer. The 2<sup>nd</sup> LO oscillates at 2.2 GHz (variable by +/- 1 MHz) for a 2<sup>nd</sup> IF of 105 MHz, which is amplified, then filtered in a 3-stage helical filter with 3 MHz bandwidth before passing through a 3<sup>rd</sup> mixer to the final 10 MHz IF, variable resolution filters, and post-resolution amplifier to the "Function IF amplifier" that implements the linear or logarithmic detector. | The 7L12 is a traditional triple-mixing spectrum analyzer design. The input signal runs through a step attenuator (0 to 60 dB in 10 dB steps), a 1.8 GHz low-pass filter and a 3 dB pad (to isolate the mixer from LPF reflections) to a 1<sup>st</sup> mixer. The 1<sup>st</sup> LO is a YIG oscillator running at 2.095 GHz to 3.9 GHz, resulting in a 2.095 GHz 1<sup>st</sup> IF. This IF passes through a "traveling wave damper" (isolator), a 2.2 GHz LPF and a 10 MHz wide 2.095 GHz bandpass filter before reaching the 2<sup>nd</sup> mixer. The 2<sup>nd</sup> LO oscillates at 2.2 GHz (variable by +/- 1 MHz) for a 2<sup>nd</sup> IF of 105 MHz, which is amplified, then filtered in a 3-stage helical filter with 3 MHz bandwidth before passing through a 3<sup>rd</sup> mixer to the final 10 MHz IF, variable resolution filters, and post-resolution amplifier to the "Function IF amplifier" that implements the linear or logarithmic detector. | ||
A phase lock circuit controls the 1<sup>st</sup> LO at spans of 0.1 MHz/Div and less, tying its frequency to a multiple of 2.21 MHz using | A phase lock circuit controls the 1<sup>st</sup> LO at spans of 0.1 MHz/Div and less, tying its frequency to a multiple of 2.21 MHz using a diode sampler employed as a mixer. The sampling gate is driven by an avalanche pulser. In phase lock, the 2<sup>nd</sup> LO is swept instead of the 1<sup>st</sup>. The fine frequency control is only operational in phase lock mode, one of the key limitations of this design. | ||
The 7L12 includes a standard sweep circuit built around the [[155-0056-00]] Sweep Control (U1140) and [[155-0042-02]] (U1160) Miller Integrator custom ICs. The 7L12 also uses the TEK-custom quad opamp [[155-0035-00]] in several places. | The 7L12 includes a standard sweep circuit built around the [[155-0056-00]] Sweep Control (U1140) and [[155-0042-02]] (U1160) Miller Integrator custom ICs. The 7L12 also uses the TEK-custom quad opamp [[155-0035-00]] in several places. |