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282: Difference between revisions
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The high-impedance input stage is a dual-JFET where transistor A operates as a source-follower and transistor B operates as a current source biased with V<sub>gs</sub> = 0, maintaining a constant (I<sub>dss</sub>) current through transistor A, independent of input signal voltage. After the FET input stage, the signal is fed to a Sziklai pair formed of a PNP transistor first, driving an NPN output transistor. The Sziklai pair is non-inverting and has a voltage gain greater than unity, which allows the overall gain of the 282 to be trimmed for exactly unity gain. The rise time is 3 ns when driven from a 25 Ω source. | The high-impedance input stage is a dual-JFET where transistor A operates as a source-follower and transistor B operates as a current source biased with V<sub>gs</sub> = 0, maintaining a constant (I<sub>dss</sub>) current through transistor A, independent of input signal voltage. After the FET input stage, the signal is fed to a Sziklai pair formed of a PNP transistor first, driving an NPN output transistor. The Sziklai pair is non-inverting and has a voltage gain greater than unity, which allows the overall gain of the 282 to be trimmed for exactly unity gain. The rise time is 3 ns when driven from a 25 Ω source. | ||
This | ==Power Supply== | ||
The 282 internally is supplied with ±10 V stabilized with Zener diodes. This allows the 282 to be compatible with the different negative supply voltages being present on the B pin of the [[Probe_power|probe power connector]] ranging from -12.2 V (3S1) to -25 V (4S1). | |||
===Compatible probe power=== | |||
* [[1S1]] | |||
* [[3S1]] | |||
* [[3S76]] | |||
* [[4S1]] | |||
* [[4S2]] | |||
==Pictures== | ==Pictures== | ||