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==Internals== | ==Internals== | ||
The data path, acquisition memory, and clock generator in the 7D01 are built using ECL circuits. | The data path, acquisition memory, and clock generator in the 7D01 are built using ECL circuits. The −5 V ECL supply is generated by a 555-driven switcher powered off the ±15 V rails. | ||
==Notes== | ==Notes== |