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Patent US 3633120A: Difference between revisions
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|Grant date=1972-01-04 | |Grant date=1972-01-04 | ||
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→ [http://w140.com/US3633120.pdf PDF version] | |||
This patent describes the '''f<sub>t</sub> doubler circuit''', a transistor amplifier topology | |||
that has a current gain of 2 even at the transit frequency of the transistors that are used in the circuit. | |||