7D02: Difference between revisions
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{{BeginSpecs}} | {{BeginSpecs}} | ||
{{Spec | Channels | up to 52 - 28 (optionally 44) synchronous, 8 sync or async (timing option) }} | {{Spec | Channels | up to 52 - 28 (optionally 44) synchronous, 8 sync or async (timing option) }} | ||
{{Spec | Inputs | (standard 7D02) 8 | {{Spec | Inputs | (standard 7D02) 8 data, 16 address, 10 control, 1 ext. trigger }} | ||
{{Spec | Memory | 256 words }} | {{Spec | Memory | 256 words }} | ||
{{Spec | Sampling Rate | up to 10 MHz }} | {{Spec | Sampling Rate | up to 10 MHz }} | ||
{{Spec | Options | | {{Spec | Options | | ||
* Option 01 − Timing | * Option 01 − Timing: Adds 8 additional asynchronous channels with sampling rates from 5 ms to 20 ns (up to 50 MHz) using a [[P6451]] logic probe;<br />255-word acquisition memory, 255-word glitch memory, 9-bit word recognizer | ||
* Option 03 − Expansion: Adds 8 | * Option 03 − Expansion: Adds 8 data and 8 address lines to 7D02, required for 16 bit microprocessors. | ||
}} | }} | ||
{{EndSpecs}} | {{EndSpecs}} |
Revision as of 02:50, 16 August 2023
The Tektronix 7D02 is a programmable logic analyzer plug-in for the 7000-series scopes.
The 7D02 is controlled by an embedded Intel 8085 microprocessor, Tektronix part number 165-1088-00 on the A09 Central Processing Unit board.
It connects to a target microprocessor system through a personality module.
Key Specifications
Channels | up to 52 - 28 (optionally 44) synchronous, 8 sync or async (timing option) |
---|---|
Inputs | (standard 7D02) 8 data, 16 address, 10 control, 1 ext. trigger |
Memory | 256 words |
Sampling Rate | up to 10 MHz |
Options |
|
Personality Modules:
- PM101 - General Purpose Logic Analysis
- PM102 - Motorola 6800
- PM103 - Motorola 6802
- PM104 - Intel 8085
- PM105 - Zilog Z-80
- PM106 - Intel 8086
- PM107 - Intel 8088
- PM108 - Zilog Z-8002
- PM109 - Motorola 68000
- PM110 - Zilog Z-8001
- PM111 - Motorola 6809
- PM112 - Multibus
See the Microprocessor support table for microprocessor disassembly configuration options.
Links
- Tekscope Vol. 12 No. 4, Dec 1980: Mike Reiney, A User-Programmable Logic Analyzer for Microprocessor Design
- 7D02 @ barrytech.com
Pictures
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7D02 bare plugin
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7D02 front panel
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7D02 top with options 01&03 installed
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7D02 in 7603 mainframe
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7D02 in mainframe with personality module in front
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Block Diagram
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Board Locations in 7D02
Custom ICs used in the 7D02
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