P7001

The Tektronix P7001 is a digitizer, processor, and memory for the 7704A oscilloscope. The P7001 can also be connected to an external computer which then is able to process the digitized signals. The complete system was called "Digital Processing Oscilloscope" or "DPO" for short and was presented to the public on 26 March 1973 at the IEEE Intercon in New York City.

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Digitizer for the 7704A oscilloscope

Produced from 1973 to 1981

Manuals

(All manuals in PDF format unless noted otherwise)

Manuals – Specifications – Links – Pictures

The design of the P7001 assumes it will be part of a 7704A system, and that the 7704A will be displaying a steady trace. The vertical and horizonal plug-ins control the beam as they would in any 7000-series scope.

The P7001 periodically samples the horizontal and vertical signals simultaneously as they pass from the plug-ins to the vertical and horizontal amplifiers. This allows it to fill its memory with data points represented as coordinate pairs, (x1,y1), (x2,y2), (x3,y3), etc. It is not necessary that x2 be greater than x1, i.e. the samples can be taken out-of-order with respect to their equivalent time in the waveform.

Key Specifications

Resolution	10 bit (V), 9 bit (H)
Memory	four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)
Sampling rate	150 kHz ±30 kHz
External interface	16 bit parallel, proprietary "CP bus" (dual 37-pin Sub-D connectors) interfacing with Tektronix CP-1100 or CP-4100 series controllers

Links

Catalog / Specs

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Internals

The signal coming from the acquisition unit enters a fast four-diode sample and hold circuit where it is sampled at 150 ksamples/sec. Each sample is digitized using a successive-approximation scheme. The analog to digital converter is made of several chips: a digital to analog converter, a comparator, and control logic.

The P7001 has its own power supply built into it, independent of the power supply in the acquisition unit of the 7704A.

The Acquisition Unit of the 7704A, the P7001 Processor, and the Display Unit of the 7704A are connected by the Acquisition-Processor-Display (APD) Interface.

Bus Priority of a fully equipped P7001

Asynchronus Bus

To provide maximum flexibility all P7001 circuit cards are connected over an 16 bit asynchronous bus with 13 address lines. The bus is mostly implemented as etched lines on the Main Interface Board. Only some High speed signals are sent through coaxial cables that connect to the cards using Peltola connectors. A serially connected line, or daisy chain, in the bus establishes device priority. This signal is called "Data Channel Grant Line". Each card has a specific location in the DPO. The position determines the priority that each card has in the use of the address and data buses. Unused slots must be fitted with a jumper card to close the daisy chain.

Memory

Several types of memory configurations were available: 1k, 2k, 3k or 4k semiconductor memory and also 4k non-volatile core memory. All configurations were available through the whole lifecycle of the P7001. The memory serves to store the acquired waveforms and their associated scale factors. It also stores the computer output for display. Depending on the configuration the following storing capabilites are available:

Configuration	Waveforms	Readout Scale factors	Messages
1k with readout	1	1	3
1k no readout(*)	2	0	0
2k with readout	2	2	4
2k no readout(*)	4	0	0
3k	4	1	4
4k	4	4	12

* Removing the Readout-Interface card doubles the space for storing waveforms but eliminates the capability of displaying informations.

Readout Interface

There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT.

External Interfaces

Part Number	Description
021-0113-00	DPO to Data General Nova
021-0116-00	DPO to APD
021-0117-00	DPO to CP1100 (CP Bus)
021-0127-00	DPO to TEK31 calculator
021-0146-00	DPO to CAMAC
021-0175-00	DPO to 4010 Family
021-0206-00	DPO to GPIB

Pictures

Front panel
P7001 in 7704A
P7001 in 7704A

Internal

Top view
Front of backplane
main interface board (backplane)
Rear of backplane
Interunit connector
Interunit connector
Interunit connector
Switching power supply
front panel rear
extender boards
"Dummy-card" or official called "Data Channel Grant jumper card". Needs to be installed in empty slots of Backplane.
Data Channel Grant Card
Bus Priority of a fully equipped P7001