P7001: Difference between revisions

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(Added pictures of dummy card and bus architecture description)
(Added Bandwidth, design team member, content to external interfaces and display generator)
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{{BeginSpecs}}
{{BeginSpecs}}
{{Spec | Bandwith | 175MHz }}
{{Spec | Resolution | 10 bit (V), 9 bit (H) }}
{{Spec | Resolution | 10 bit (V), 9 bit (H) }}
{{Spec | Memory | four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)  }}
{{Spec | Memory | four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)  }}
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|}
|}


<nowiki>*</nowiki> Removing the Readout-Interface card doubles the space for storing waveforms but eliminates the capability of displaying informations.
<nowiki>*</nowiki> Removing the Readout-Interface card doubles the space for storing waveforms but eliminates the capability of displaying text information.


==Readout Interface==
==Readout Interface==
There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT.
There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT.
==Display Generator==
The Display Generator card generates the CRT display of either real-time computer output (XY mode) or data stored in the processsors memory (XT mode). Any combination of the stored and acquired waveforms may be displayed simultaneously. Also, since the display generator operates independent of other devices, changing data may be viewed during a store operation. The Display Generator card has a set of jumpers which switch the CRT output between vector and dot display.


==External Interfaces==
==External Interfaces==
The external interface card provides a bilateral link between the P7001 and an external controller. The controller has full access to all programmable functions in the Processor, and the P7001, in turn, may interrupt the controller at any time. During the production time of the P7001, the following interfaces were developed:
   
   
{| class="wikitable"
{| class="wikitable"
|-
|-
! Description
! Part Number
! Part Number
! Description
! Manual
|-
|-
| DPO to Data General Nova
| 021-0113-00
| 021-0113-00
| DPO to Data General Nova
| [[Media:070-1776-00.pdf|070-1776-00.pdf]]
|-
|-
| DPO to APD (CP Bus)
| 021-0116-00
| 021-0116-00
| DPO to APD
| [[Media:070-1654-00.pdf|070-1654-00.pdf]]
|-
|-
| DPO to CP1100 (CP Bus)
| 021-0117-00
| 021-0117-00
| DPO to CP1100 (CP Bus)
| [http://w140.com/p7001/CP_bus.pdf 070-1654-01.pdf]
|-
|-
| DPO to TEK31 calculator
| 021-0127-00
| 021-0127-00
| DPO to TEK31 calculator
| [[Media:070-1777-00.pdf|070-1777-00.pdf]]
|-
|-
| DPO to CAMAC
| 021-0146-00
| 021-0146-00
| DPO to CAMAC
|  
|-
|-
| DPO to 4010 Family
| 021-0175-00
| 021-0175-00
| DPO to 4010 Family
| [[Media:070-1936-00.pdf|070-1936-00.pdf]]
|-
|-
| DPO to GPIB
| 021-0206-00
| 021-0206-00
| DPO to GPIB
| [[Media:070-2623-00.pdf|070-2623-00.pdf]]
|}
|}


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'''Design Team'''
'''Design Team'''
<br />Notable Members of the Design Team were: [[Hiro Moriyasu]], [[Bruce Hamilton]], [[Luis Navarro]] and [[Jack Gilmore]].
<br />Notable Members of the Design Team were: [[Hiro Moriyasu]], [[Bruce Hamilton]], [[Luis Navarro]], [[Bob Shand]] and [[Jack Gilmore]].


<gallery>
<gallery>

Revision as of 00:15, 4 August 2019

{{{manufacturer}}} 
Digitizer for the 7704A oscilloscope
Tektronix P7001 front panel

Produced from 1973 to 1981

Manuals
(All manuals in PDF format unless noted otherwise)
Manuals – Specifications – Links – Pictures


The Tektronix P7001 is a digitizer, processor, and memory for the 7704A oscilloscope. The P7001 can also be connected to an external computer which then is able to process the digitized signals. The complete system was called "Digital Processing Oscilloscope" or "DPO" for short and was presented to the public on 26 March 1973 at the IEEE Intercon in New York City.

The design of the P7001 assumes it will be part of a 7704A system, and that the 7704A will be displaying a steady trace. The vertical and horizonal plug-ins control the beam as they would in any 7000-series scope.

The P7001 periodically samples the horizontal and vertical signals simultaneously as they pass from the plug-ins to the vertical and horizontal amplifiers. This allows it to fill its memory with data points represented as coordinate pairs, (x1,y1), (x2,y2), (x3,y3), etc. It is not necessary that x2 be greater than x1, i.e. the samples can be taken out-of-order with respect to their equivalent time in the waveform.

Key Specifications

Bandwith 175MHz
Resolution 10 bit (V), 9 bit (H)
Memory four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)
Sampling rate 150 kHz ±30 kHz
External interface 16 bit parallel, proprietary "CP bus" (dual 37-pin Sub-D connectors) interfacing with Tektronix CP-1100 or CP-4100 series controllers

Links

Catalog / Specs

Advertising

Internals

The signal coming from the acquisition unit enters a fast four-diode sample and hold circuit where it is sampled at 150 ksamples/sec. Each sample is digitized using a successive-approximation scheme. The analog to digital converter is made of several chips: a digital to analog converter, a comparator, and control logic.

The P7001 has its own power supply built into it, independent of the power supply in the acquisition unit of the 7704A.

The Acquisition Unit of the 7704A, the P7001 Processor, and the Display Unit of the 7704A are connected by the Acquisition-Processor-Display (APD) Interface.

Bus Priority of a fully equipped P7001

Asynchronus Bus

To provide maximum flexibility all P7001 circuit cards are connected over an 16 bit asynchronous bus with 13 address lines. The bus is mostly implemented as etched lines on the Main Interface Board. Only some High speed signals are sent through coaxial cables that connect to the cards using Peltola connectors. A serially connected line, or daisy chain, in the bus establishes device priority. This signal is called "Data Channel Grant Line". Each card has a specific location in the DPO. The position determines the priority that each card has in the use of the address and data buses. Unused slots must be fitted with a jumper card to close the daisy chain.


Memory

Several types of memory configurations were available: 1k, 2k, 3k or 4k semiconductor memory and also 4k non-volatile core memory. All configurations were available through the whole lifecycle of the P7001. The memory serves to store the acquired waveforms and their associated scale factors. It also stores the computer output for display. Depending on the configuration the following storing capabilites are available:

Configuration Waveforms Readout
Scale factors 		Messages
1k with readout 1 1 3
1k no readout(*) 2 0 0
2k with readout 2 2 4
2k no readout(*) 4 0 0
3k 4 1 4
4k 4 4 12

* Removing the Readout-Interface card doubles the space for storing waveforms but eliminates the capability of displaying text information.

Readout Interface

There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT.

Display Generator

The Display Generator card generates the CRT display of either real-time computer output (XY mode) or data stored in the processsors memory (XT mode). Any combination of the stored and acquired waveforms may be displayed simultaneously. Also, since the display generator operates independent of other devices, changing data may be viewed during a store operation. The Display Generator card has a set of jumpers which switch the CRT output between vector and dot display.

External Interfaces

The external interface card provides a bilateral link between the P7001 and an external controller. The controller has full access to all programmable functions in the Processor, and the P7001, in turn, may interrupt the controller at any time. During the production time of the P7001, the following interfaces were developed:

Description Part Number Manual
DPO to Data General Nova 021-0113-00 070-1776-00.pdf
DPO to APD (CP Bus) 021-0116-00 070-1654-00.pdf
DPO to CP1100 (CP Bus) 021-0117-00 070-1654-01.pdf
DPO to TEK31 calculator 021-0127-00 070-1777-00.pdf
DPO to CAMAC 021-0146-00
DPO to 4010 Family 021-0175-00 070-1936-00.pdf
DPO to GPIB 021-0206-00 070-2623-00.pdf

Pictures

  • Front panel

    Front panel

  • P7001 in 7704A

    P7001 in 7704A

  • P7001 in 7704A

    P7001 in 7704A

Internal

  • Top view

    Top view

  • Front of backplane

    Front of backplane

  • main interface board (backplane)

    main interface board (backplane)

  • Rear of backplane

    Rear of backplane

  • Interunit connector

    Interunit connector

  • Interunit connector

    Interunit connector

  • Interunit connector

    Interunit connector

  • Switching power supply

    Switching power supply

  • front panel rear

    front panel rear

  • extender boards

    extender boards

  • "Dummy-card" or official called "Data Channel Grant jumper card". Needs to be installed in empty slots of Backplane.

    "Dummy-card" or official called "Data Channel Grant jumper card". Needs to be installed in empty slots of Backplane.

  • Data Channel Grant Card

    Data Channel Grant Card

  • Bus Priority of a fully equipped P7001

    Bus Priority of a fully equipped P7001

Keyboard overlay cards

  • blank card for user definable programs

    blank card for user definable programs

  • Two examples of original overlay cards

    Two examples of original overlay cards

  • Example of aftermarket overlay cards

    Example of aftermarket overlay cards

External Interfaces (optional)

  • CPBus interface mounted

    CPBus interface mounted

  • CP Bus Interface front

    CP Bus Interface front

  • CP Bus Interface rear

    CP Bus Interface rear

  • GPIB Interface IO board

    GPIB Interface IO board

  • GPIB Interface IO board with shielding

    GPIB Interface IO board with shielding

  • GPIB Interface CPU board

    GPIB Interface CPU board

  • Modern clone of the P7001 GPIB interface

    Modern clone of the P7001 GPIB interface

  • Modern clone of the P7001 GPIB interface

    Modern clone of the P7001 GPIB interface

Sample and Hold Card

  • Vertical sampling bridge

    Vertical sampling bridge

  • Horizontal sampling bridge

    Horizontal sampling bridge

  • Sampling strobe generator

    Sampling strobe generator

  • Sample and hold edge connector

    Sample and hold edge connector

  • Sample and hold transformers

    Sample and hold transformers

  • Sample and hold transformer

    Sample and hold transformer

  • Sample and hold rear

    Sample and hold rear

Core Memory (optional)

  • Address decoder

    Address decoder

  • Core boards

    Core boards

  • Core memory

    Core memory

  • Core closeup

    Core closeup

  • Core closeup

    Core closeup

  • High Resolution view of partial core module

    High Resolution view of partial core module

Semiconductor memory (optional)

  • 2K semiconductor memory (aka "MOS")

    2K semiconductor memory (aka "MOS")

ADC and Display

  • Front panel connections

    Front panel connections

  • ADC

    ADC

  • ADC rear

    ADC rear

  • Probe points on ADC

    Probe points on ADC

  • Display generator

    Display generator

  • Display generator rear

    Display generator rear

  • Z-axis and panel controller

    Z-axis and panel controller

  • Z-axis and panel controller rear

    Z-axis and panel controller rear

  • Readout interface

    Readout interface

Hardware signal Averager (HSA)

  • HSA timing board. The HSA module (optional) performs signal averaging and can calculate a histogram.

    HSA timing board. The HSA module (optional) performs signal averaging and can calculate a histogram.

  • HSA memory board.

    HSA memory board.

Schematics

  • Block Diagram

    Block Diagram

  • Address map of a fully equipped P7001

    Address map of a fully equipped P7001

  • Power supply schematic 1

    Power supply schematic 1

  • Power supply schematic 2

    Power supply schematic 2

  • APD Interconnect

    APD Interconnect

Cofigurations

  • Example of Calculator based system (WP1100) in 1974

    Example of Calculator based system (WP1100) in 1974

  • Example of Calculator based system (WP1100) in 1978

    Example of Calculator based system (WP1100) in 1978

  • Example of Controller based system (WP1200) in 1973

    Example of Controller based system (WP1200) in 1973

  • Example of Controller based system (WP1200) in 1975

    Example of Controller based system (WP1200) in 1975

Workflow with connected Controller

  • With pressing a program-call button on the P7001...

    With pressing a program-call button on the P7001...

  • .. the displayed signal is digitized...

    .. the displayed signal is digitized...

  • ...and transferred to the Controller...

    ...and transferred to the Controller...

  • ...the Controller does some calculations...

    ...the Controller does some calculations...

  • ...and transfers the result back to the P7001

    ...and transfers the result back to the P7001

X/Y Mode for external Controller

  • A connected computer has direct access to the Display Generator. This allows software-controlled live movements of the Beam.

    A connected computer has direct access to the Display Generator. This allows software-controlled live movements of the Beam.

Design Team
Notable Members of the Design Team were: Hiro Moriyasu, Bruce Hamilton, Luis Navarro, Bob Shand and Jack Gilmore.

  • Key design Team of the P7001.

    Key design Team of the P7001.


Firmware (uploaded BIN files)

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