Zilog Z-80: Difference between revisions
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==Supported by== | ==Supported by== | ||
* [[7D02]] | * [[7D02]]/[[DAS9100]] + [[PM105]] | ||
* [[1205]] | * [[1205]] + [[PM302]] | ||
* [[1220]] | * [[1220]]/[[1225]]/[[1230]] + [[PM402]] | ||
* [[1240]] | * [[1240]]/[[1241]] + [[12RM41]] | ||
''NSC800'' | |||
* [[1240]]/[[1241]] + [[12RM71]] | |||
* [[MicroLab I]] | |||
See also ''[[Microprocessor support table]]''. | |||
[[Category:Microprocessors]] | [[Category:Microprocessors]] | ||
[[Category:Introduced in 1975]] | [[Category:Introduced in 1975]] |
Revision as of 07:07, 15 December 2022
The Zilog Z80 is an 8-bit microprocessor introduced in 1975.
It implements an upward-compatible extension of the Intel 8080 instruction set, and requires only a +5 V supply. It adds several registers, a vectored interrupt system, and a hardware DRAM refresh counter to the 8080 architecture.
There were several speed grades, initially starting at 2.5 MHz (non-suffix) / 4 MHz (Z80A) / 6 MHz (Z80B), etc., later CMOS versions up to 20 MHz, and derivatives up to about 50 MHz. Several second-source manufacturers produced their versions of this CPU.
The National Semiconductor NSC800 is code-compatible with the Z-80 but has a multiplexed address/data bus like the Intel 8085, without being pin compatible with either.
Links
Used in
Supported by
NSC800
See also Microprocessor support table.