|Bandwidth||DC to 600 MHz plus 100 MHz and 20 MHz BWL filters|
|Number of Inputs||2|
|Rise time||580 ps in 1 GHz mainframe such as the 11402, 11402A. 11403, 11403A, DSA601A, or DSA602A|
|Deflection||1 mV to 10V per division in 1% calibrated steps|
|Input impedance||50 Ω|
In the 11A52, the digital output of the M94 overload detectors (one per channel) are received by the microprocessor. If overload is detected, software running in the microprocessor switches the input relay to remove the signal from the 50 Ω attenuator. This is in contrast to the 485, where the M94 directly controls the input relay.
During the 11A52's self-check, the M94 IC for each channel is tested. An analog switch injects test currents, positive and negative, into the summing junction at the input of each M94. The outputs are checked by the self-check software routine.