DC503: Difference between revisions

From TekWiki
Jump to navigation Jump to search
(Added some specifications)
No edit summary
 
(19 intermediate revisions by 4 users not shown)
Line 1: Line 1:
{{TM500 | mfg=Tektronix | type=DC503 | function=100 MHz frequency counter | class=counter | image=Tek-dc503-front.jpg | introduced=1972 | discontinued=1993 |
{{TM500 | mfg=Tektronix | type=DC503 | function=100 MHz, 7-digit frequency counter | class=counter | image=DC503 early operating.jpg | introduced=1972 | discontinued=1981
manuals=
|designers=Roland Crop;Jim Geddes
* [http://w140.com/smb/DC503_SM.pdf Tektronix DC503 Manual (OCR, PDF)]
|manuals=
* [http://w140.com/smb/DC503A_SM.pdf Tektronix DC503A Manual (OCR, PDF)]
* [[Media:070-1411-01.pdf|DC503 Manual]] (OCR)
* [http://w140.com/tek_dc503a_military_manual.pdf Tektronix DC503A Military Manual (PDF)]
* [[Media:Tek_DC503_M23275-1_Improved_Channel_A_Triggering.pdf|DC503 M23275-1 Improved Ch A Triggering]]
* [[Media:Tek dc503 fcp no ocr.pdf|Tektronix DC503 Factory Calibration Procedure (PDF, needs OCR)]]
* [[Media:050-1276-00.pdf|DC501, DC502, DC503 Service Note 050-1276-00]]
}}
* [[Media:Tek_DC503_FCP_1977-02-18.pdf|Tektronix DC503 Factory Calibration Procedure]] (OCR)
}}. It was [[introduced in 1972]] at the launch of the TM500 system, and superseded by the [[DC503A]] in 1981.
 
Opt.01 is an [[wikipedia:Crystal oven|OCXO]] for improved stability.


{{BeginSpecs}}
{{BeginSpecs}}
{{SpecGroup | DC503 }}
{{Spec|Resolution      | 7 digits}}
{{Spec | Frequency DC Coupled| 0.1 Hz to 100 MHz }}
{{Spec | Frequency Range | 0.1 Hz (AC coupled: 10 Hz) to 100 MHz }}
{{Spec | Frequency AC Coupled| 10 Hz to 100 MHz }}
{{Spec | Impedance | 1 MΩ paralleled by approx. 20 pF}}
{{Spec | Impedance | 1MΩ paralleled by approx. 20pF}}
{{Spec | Sensitivity | 300 mV<sub>p-p</sub> sinewave times attenuation to 100 MHz }}
{{Spec | Sensitivity | 300mV p-p sinewave times attenuation to 100MHz }}
{{Spec | Max Input Voltage, 1× Att. | 50 V @ ≤2 kHz, derate –20 dB/decade to 10 MHz; 10 V @ 10 kHz to 25 MHz, derate –20 dB/decade to 50 MHz; 5 V @ 50 MHz to 100 MHz }}
{{Spec | Max Input Voltage | 1x Atten: 50V @ ≤2kHz, derate -20dB/decade to 10MHz; 10V @ 10kHz to 25MHz, derate -20dB/decade to 50MHz; 5V @ 50MHz to 100MHz }}
{{Spec | Max Input Voltage, 10×/100× Att. | 500 V @ ≤2 MHz, derate –20 dB/decade to 100 MHz }}
{{Spec | Max Input Voltage | 10x/100x Atten: 500V @ ≤2MHz, derate -20dB/decade to 100MHz }}
{{SpecGroup | Standard time base }}
{{SpecGroup | DC503A }}
{{Spec | Frequency | 1 MHz ± 1 × 10<sup>-7</sup> at cal }}
{{Spec | Frequency DC Coupled| 0 Hz to ≥125 MHz }}
{{Spec | Error | ≤ ±1 × 10<sup>-5</sup> from 0 °C to +50 °C }}
{{Spec | Frequency AC Coupled| 10 Hz to ≥125 MHz }}
{{Spec | Aging | ≤ ±1 × 10<sup>-5</sup> per month }}
{{Spec | Impedance | 1MΩ paralleled by approx. 27pF}}
{{SpecGroup | Opt.01 OCXO time base }}
{{Spec | Sensitivity | 20mV RMS sinewave to 100MHz, 35mV RMS sinewave to 125MHz }}
{{Spec | Frequency | 5 MHz ± 5 × 10<sup>-9</sup> at cal }}
{{Spec | Max Input Voltage | 1x Atten: 200V<sub>peak</sub>, 400V<sub>p-p</sub> @ DC-50kHz; 200Vpeak, (20/f)V<sub>p-p</sub> @ 50kHz - 1.33MHz; 200V<sub>peak</sub>, ≤15V<sub>p-p</sub> @ 1.33MHz to 125MHz }}
{{Spec | Error | ±5 × 10<sup>-7</sup> from 0 °C to +50 °C (after oven warm-up) }}
{{Spec | Max Input Voltage | 5x Atten: 200V<sub>peak</sub>, 400V<sub>p-p</sub> @ DC-5MHz; 200V<sub>peak</sub>, (2000/f)V<sub>p-p</sub> @ 5MHz - 100MHz; 200V<sub>peak</sub>, ≤20V<sub>p-p</sub> @ 100MHz to 125MHz }}
{{Spec | Aging | ≤ ±1 × 10<sup>-7</sup> per month }}
{{EndSpecs}}
{{EndSpecs}}


==Gerbers==
* [[Media:670-3300-00.zip|Divide-by-5 circuit board gerbers 670-3300-00]] (ZIP)
==Rear interface==
<small>
{|
|-
|                              ||  27A – Internal scan clock disable
|-
|                              ||  26A − Reset, in/out
|-
| 25B − Ext scan clock in      ||  25A − Time slot zero (TS<sub>0</sub>)
|-
| 24B − Scan clock out        ||
|-
| 23B − Overflow disp.dis. in  ||
|-
| 22B − Overflow out          ||
|-
| 21B − BCD out 2              || 21A − TTL Clock Input
|-
| 20B − BCD out 8              || 20A − BCD out 4
|-
| 19B − Latch Out (Data Good)  || 19A − BCD out 1
|-
| 17B – Ch B Input            || 17A – Ch A Input GND
|-
| 16B – Ch B Input GND        || 16A − Ch A Input
|-
|                              || 14A − 1 MHz clock out
|}
</small>
==Links==
{{Documents|Link=DC503}}


==Pictures==
==Pictures==
<gallery>
<gallery>
Tek-dc503-front.jpg | DC503
DC503 early operating.jpg | DC503 front (older version) in operation
Tek dc503 fronttop.jpg|DC503
Tek dc503 fronttop.jpg   | DC503 front (older version)
Tek dc503.jpg | DC503
Tek-dc503-front.jpg       | DC503 front (newer version)
dc503a.jpg | DC503A
Tek dc503 on.jpg         | DC503 in operation
Tek dc503a on.jpg|DC503A
Tek dc503.jpg  
Tek dc503 pg502.jpg|DC503 and [[PG502]] in a [[TM503]]
Tek dc503 pg502.jpg       | DC503 and [[PG502]] in a [[TM503]]
Tek dc503 rear.jpg|DC503
Tek dc503 rear.jpg       | DC503 rear
Tek dc503 top.jpg|DC503
Tek dc503 top.jpg         | DC503 top
Tek dc503 34.jpg|DC503
Tek dc503 34.jpg
Tek dc503 on.jpg|DC503
</gallery>  
Tek dc503a left internal.jpg|DC503A left internal
 
</gallery>
==Components==
{{Parts|DC503}}

Latest revision as of 10:12, 6 December 2023

Tektronix DC503
100 MHz, 7-digit frequency counter
Tektronix DC503

Produced from 1972 to 1981

Manuals
Manuals – Specifications – Links – Pictures

The Tektronix DC503 is a 100 MHz, 7-digit frequency counter plug-in for the TM500 system. . It was introduced in 1972 at the launch of the TM500 system, and superseded by the DC503A in 1981.

Opt.01 is an OCXO for improved stability.

Key Specifications

Resolution 7 digits
Frequency Range 0.1 Hz (AC coupled: 10 Hz) to 100 MHz
Impedance 1 MΩ paralleled by approx. 20 pF
Sensitivity 300 mVp-p sinewave times attenuation to 100 MHz
Max Input Voltage, 1× Att. 50 V @ ≤2 kHz, derate –20 dB/decade to 10 MHz; 10 V @ 10 kHz to 25 MHz, derate –20 dB/decade to 50 MHz; 5 V @ 50 MHz to 100 MHz
Max Input Voltage, 10×/100× Att. 500 V @ ≤2 MHz, derate –20 dB/decade to 100 MHz
     — Standard time base
Frequency 1 MHz ± 1 × 10-7 at cal
Error ≤ ±1 × 10-5 from 0 °C to +50 °C
Aging ≤ ±1 × 10-5 per month
     — Opt.01 OCXO time base
Frequency 5 MHz ± 5 × 10-9 at cal
Error ≤ ±5 × 10-7 from 0 °C to +50 °C (after oven warm-up)
Aging ≤ ±1 × 10-7 per month

Gerbers

Rear interface

27A – Internal scan clock disable
26A − Reset, in/out
25B − Ext scan clock in 25A − Time slot zero (TS0)
24B − Scan clock out
23B − Overflow disp.dis. in
22B − Overflow out
21B − BCD out 2 21A − TTL Clock Input
20B − BCD out 8 20A − BCD out 4
19B − Latch Out (Data Good) 19A − BCD out 1
17B – Ch B Input 17A – Ch A Input GND
16B – Ch B Input GND 16A − Ch A Input
14A − 1 MHz clock out

Links

Documents Referencing DC503

Document Class Title Authors Year Links
Tekscope 1974 V6 N3.pdf Article The 31/53 Calculator-based Measurement Instrumentation Package John Mulvey 1974
070-2088-00.pdf Book TM500 Series Rear Interface Data Book 1975
070-2088-01.pdf Book TM500 Series Rear Interface Data Book 1976
070-2088-04.pdf Book TM500 Series Rear Interface Data Book 1985

Pictures

Components

Some Parts Used in the DC503

Part Part Number(s) Class Description Used in
2N4249 151-0342-00 Discrete component PNP Si low noise amp. DC501 DC502 DC503 DC503A DC504 DC504A DC505 DC505A DC508 DC508A DC509 DC510