DC505

Manuals – Specifications – Links – Pictures

The Tektronix DC505 is a 225 MHz counter/timer plug-in for the TM500 system.

It was superseded by the DC505A in 1976.

Key Specifications

Frequency range	0 Hz (DC coupled) / 10 Hz (AC coupled) to 225 MHz
Sensitivity	50 mVRMS to 150 MHz, 100 mVRMS to 225 MHz (sine)
Resolution	7 digits
Gate time	0.01 s to 10 s in decade steps
Stability	Standard: 1×10−5; Opt.1: 5×10−7 (0°C to +50°C, after 30 min warm-up)
Long-term drift	Standard: 1×10−5 per month; Opt.1: 5×10−7 per month
Features	Two input channels (BNC connectors) Functions: Frequency, frequency ratio, period, interval, pulse width, events
Options	Opt.1: 5 MHz TCXO (with ÷5 divider)

Links

• DC505 @ barrytech.com

Rear Interface

Connector Pin	Signal	Connector Pin	Signal
		27A	Internal Scan Clock Disable
26B	Manual Start-Stop	26A	/RESET
25B	Internal Scan Clock Out	25A	Time Slot Zero
24B	Internal Scan Clock Out
23B	Overflow
21B	BCD output 2
20B	BCD output 8	20A	BCD output 4
19B	Data Good	19A	BCD output 1
		14A	Ext Clock Input Int 1 MHz out via 200 Ω

Data is output serially by digit.

Internals

An internal VCO, phase-locked to the 1 MHz master, produces a 100 MHz input to the counter chain for timing measurements.

The DC505 uses a mix of ECL and TTL dividers and logic, and a Mostek MK5007 four-decade counter/latch/multiplexer (U700). Unlike the similarly-specified 7D15, it employs no Tek made custom ICs. The first counter decade is implemented as a divide-by-2 ECL flip-flop (U342, MC1670) followed by a five-stage ring counter made with MC10131 ECL flipflops, and some logic to BCD-encode the count result. A similar circuit exists in the reference divider chain.

In the power supply, a 723 regulator provides +5 V from the 17.5 V_AC mainframe rails using the mainframe's NPN pass transistor. Its output includes a zener/SCR crowbar circuit. Another 723 provides +15 V from the +33 V rail. A discrete regulator using the PNP pass transistor produces –10 V from the –33 V rail.

Pictures

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  DC505